

#include "drv_dsp.h"
#ifdef SUPPORT_FM1505_DMS

const reg_config_t dsp_sleep_AFE[] = {
    // AFE command// base 0x0FD88050
    {0x00000000, 0x00000000}, //* AFE_IN1_CON1 */
    {0x00000004, 0x00000000}, //* AFE_IN1_CON2 */
    {0x00000008, 0x00000000}, //* AFE_IN1_CON3 */
    {0x0000000C, 0x00000000}, //* AFE_IN2_CON1 */
    {0x00000010, 0x00000000}, //* AFE_IN2_CON2 */
    {0x00000014, 0x00000000}, //* AFE_IN2_CON3 */
    {0x00000018, 0x00000000}, //* AFE_IN3_CON1 */
    {0x0000001C, 0x00000000}, //* AFE_IN3_CON2 */
    {0x00000020, 0x00000000}, //* AFE_IN3_CON3 */
    {0x00000024, 0x00000000}, //* AFE_IN4_CON1 */
    {0x00000028, 0x00000000}, //* AFE_IN4_CON2 */
    {0x0000002C, 0x00000000}, //* AFE_IN4_CON3 */
    {0x0000003C, 0x00000000}, //* AFE_OUT1_CON1 */
    {0x00000040, 0x00000000}, //* AFE_OUT1_CON2 */
    {0x00000044, 0x00000000}, //* AFE_OUT1_CON3 */
    {0x00000048, 0x00000000}, //* AFE_OUT2_CON1 */
    {0x0000004C, 0x00000000}, //* AFE_OUT2_CON2 */
    {0x00000050, 0x00000000}, //* AFE_OUT2_CON3 */
    {0x00000054, 0x00000000}, //* AFE_OUT3_CON1 */
    {0x00000058, 0x00000000}, //* AFE_OUT3_CON2 */
    {0x0000005C, 0x00000000}, //* AFE_OUT3_CON3 */
    {0x00000060, 0x00000000}, //* AFE_OUT4_CON1 */
    {0x00000064, 0x00000000}, //* AFE_OUT4_CON2 */
    {0x00000068, 0x00000000}, //* AFE_OUT4_CON3 */
    {0x00000078, 0x00000000}, //* AFE_M_I2S1_RX */	// set 2-ch I2S, slave
    {0x0000007C, 0x00000000}, //* AFE_M_I2S1_TX */ // set 2-ch I2S, master
    {0x00000080, 0x00000000}, //* AFE_M_I2S2_RX */ // set 2-ch I2S
    {0x00000084, 0x00000000}, //* AFE_M_I2S2_TX */ // set 2-ch I2S
    {0x00000088, 0x00000000}, //* AFE_M_I2S3_RX *//
    {0x0000008C, 0x00000000}, //* AFE_M_I2S3_TX *//
    {0x00000090, 0x00000000}, //* AFE_M_MICS1_CON1 *// SRC clock divider//org 0x0C000400
    {0x00000094, 0x00000000}, //* AFE_M_MICS1_CON2 */
    {0x00000098, 0x00000000}, //* AFE_M_MICS1_VOL */ // 0dB
    {0x0000014C, 0x00000000}, //* AEC_S1_CON *// disable AEC
    {0x00000150, 0x00000020}, //* AECS1_REF1_CON */ // I2S2Tx0 disable
    {0x00000154, 0x00000021}, //* AECS1_REF2_CON */ // I2S2Tx1 disable
    {0x0000028C, 0x00000001}  //* COMM_SCENE_FLAG *//
};

const size_t dsp_sleep_AFE_size = sizeof(dsp_sleep_AFE) / sizeof(reg_config_t);
#endif
